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dear customers, about the change in the name such as "oki electric industry co. ltd." and "oki" in documents to oki semiconductor co., ltd. the semiconductor business of oki electric industry co., ltd. was succeeded to oki semiconductor co., ltd. on oc tober 1, 2008. therefore, please accept that although the terms and marks of "oki electric indust ry co., ltd.", ?oki electric?, and "oki" remain in the documents, they all have been changed to "oki semiconductor co., ltd.". it is a change of the company name, the co mpany trademark, and the logo, etc. , and not a content change in documents. october 1, 2008 oki semiconductor co., ltd. 550-1 higashiasakawa-cho, hachio ji-shi, tokyo 193-8550, japan http://www.okisemi.com/en/
fedl63295a-02 1 semiconductor this version: jul. 2001 previous version: nov. 2000 ml63295a 4-bit microcontroller with built-in 3072-dot matrix lcd driver and melody circuit 1/38 general description the ml63295a is a cmos 4-bit microcontroller that employs oki?s original cpu core nx-4/250. the ml63295a operates on a power supply voltage of 6 v. with built-in 3072-dot matrix lcd drivers (96 seg. 32 com.), the ml63295a is suited for applications such as electronic dictionaries with an lcd. features extensive instruction set 439 instructions: transfer, rotate, increment/decrement, arithmetic operations, compare, logic operations, mask operations, bit operations, rom table reference, external memory transfer, stack operations, flag operations, jump, conditional branch, call/return, control wide variety of addressing modes indirect addressing mode for 4 types of data memory with current bank register, extra bank register, hl register and xy register data memory bank internal direct addressing mode processing speed 2 clocks per machine cycle, with most instructions executed in 1 machine cycle minimum instruction execution time : 61 s (@ 32.768 khz system clock) : 1 s (@ 2 mhz system clock) clock generation circuit low-speed clock : crystal oscillation or rc oscillation selected with mask option (30 khz to 80 khz) high-speed clock: ceramic oscillation or rc oscillation selected with software (2 mhz max) program memory space 32 k words basic instruction length is 16 bits/1word. data memory space 2048 nibbles external data memory space 64 kbytes (expandable furthermore by using the i/o ports) stack level call stack level : 16 levels register stack level : 16 levels
fedl63295a-02 1 semiconductor ml63295a 2/38 ports input ports: selectable as input pull-up resistor/input pull-down resistor/high impedance input. output ports: selectable as p-channel open drain output/n-channel open drain output/high-impedance output/cmos output. i/o ports: selectable as input pull-up resistor/input pull-down resistor/high impedance input. selectable as p-channel open drain output/n-channel open drain output/high-impedance output/ cmos output. can be interfaced with external peripherals that use a different power supply than this device uses. number of ports: input port : 2 ports 4 bits output port : 6 ports 4 bits input-output port : 6 ports 4 bits melody output melody frequency : 529 hz to 2979 hz tone length : 63 varieties tempo : 15 varieties melody data : stored in program memory buzzer driver signal output : 4 khz lcd driver number of segments : 3072 max. (96 seg. 32 com.) duty : selectable as 1/2, 1/4, 1/6, 1/8, 1/10, 1/12, 1/14, 1/16, 1/18, 1/20, 1/22, 1/24, 1/26, 1/28, 1/30, or 1/32 duty bias : selectable as 1/5 or 1/6 bias (regulator built-in) frame frequency : ex. 64 hz (at 1/32 duty), 128 hz (at 1/16 duty), 256 hz (at 1/8 duty), 512 hz (at 1/4 duty), 1024 hz (at 1/2 duty) contrast : 16 levels adjustable display modes : selectable as all-on mode/all-off mode/power down mode/normal display mode multiplier/divider circuit multiplier : (8 bits) (8 bits) product (16 bits) divider : (16 bits) / (8 bits) quotient (16 bits), remainder (8 bits) system reset function system reset through reset pin system reset by power-on detection system reset by low-speed oscillation halt battery check low-voltage supply check the value of the judgment voltage is selected by the software (by setting the ld1 and ld0 bits of bldcon). ld1 ld0 judgment voltage (v) remarks 1 0 4.5 0.1 ta = 25 c 1 1 5.1 0.1 ta = 25 c
fedl63295a-02 1 semiconductor ml63295a 3/38 timers and counter 8-bit timer : 2 selectable as auto-reload mode/clock frequency measurement mode watchdog timer : 1 100 hz timer : 1 measurable in steps of 1/100 sec. 15-bit time-base counter : 1 1, 2, 4, 8, 16, 32, 64, and 128 hz signals can be read serial port mode : selectable as uart mode, synchronous mode uart communication speed : 1200 bps, 2400 bps, 4800 bps, 9600 bps clock frequency in synchronous mode : internal clock mode (32.768 khz), external clock frequency data length : 5 to 8 bits shift register shift clock : 1 or 1/2 system clock, external clock data length : 8 bits interrupt factors external interrupt : 5 internal interrupt : 12 operating temperature : ?20 to +70 c power supply voltage : 3.5 to 7.2 v package: chip (212 pads) : (product name: ml63295a-xxxwa) 240-pin plastic qfp (qfp240-p-3232-0.50-bk4) : (product name: ML63295A-XXXGA) ?.under consideration xxx indicates a code number.
fedl63295a-02 1 semiconductor ml63295a 4/38 block diagram asterisks (*) indicate the port secondary functions. signal names enclosed by chain lines ( ) indicate interface signals of the v ddi power supply system. signal names enclosed by indicates signals of the v dde power supply system. nx-4/250 timing cont. cbr ebr h l x y ra mie a instruction decoder ir bus cont. rom 32 kw sp rsp c g z stack cal.s:16-level reg.s:16-level pc alu tbc rst tst xt0 xt1 osc0 osc1 osc reset melody i/o port output int 4 int 4 tst2 data bus bld wdt int 1 tst1 100hztc int 1 v ddx1 bias extmem 64 kb d0-7* a0-15* rd* wr* md mdb p8.0-p8.3 p9.0-p9.3 pa.0-pa.3 p2.0-p2.3 p3.0-p3.3 p4.0-p4.3 p5.0-p5.3 lcd & dspr com1-com32 seg0-seg95 v ddi v ss pb.0-pb.3 pc.0-pc.3 timer 8 bit (2ch) int 2 t2ck* t3ck* sio rxc* txc* int 2 rxd* txd* pe.0-pe.3 p6.0-p6.3 p7.0-p7.3 muldiv sft sclk* sout* sin* input port int 1 p0.0-p0.3 p1.0-p1.3 int 1 int 1 ram 2048n int vr v ddl v dd v ddx2 v ddx3 v ddx4 c1 c2 v dd1 v dd2 v dd3 v dd4 v dd5 v dd6 v dde cpu core
fedl63295a-02 1 semiconductor ml63295a 5/38 pin configuration (top view) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 p9.1 27 28 29 p9.0 p8.3 p8.2 30 p8.0 31 p7.3 32 p7.2 33 34 35 p7.1 p7.0 p6.3 36 37 38 p6.2 p6.1 (nc) com32 v ss v dd1 v dd2 com27 com28 com29 com31 com23 com24 com25 com26 170 169 168 147 173 172 171 240 239 238 237 236 235 234 233 232 231 230 229 228 227 226 225 224 223 222 221 220 219 218 217 216 215 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 39 40 41 42 43 44 pa.3 pa.2 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 156 155 154 153 152 151 150 149 148 167 166 165 164 163 162 161 160 159 158 157 178 177 176 179 175 174 214 213 212 211 210 209 208 206 205 204 203 202 201 200 199 198 197 196 seg70 seg71 seg65 seg66 seg67 seg60 seg61 seg62 seg63 seg45 seg46 seg47 (nc) seg64 seg68 seg69 com18 seg43 seg42 seg40 seg39 seg38 seg37 seg36 (nc) (nc) seg41 v dd5 v dd6 v ddx1 v ddx2 v ddx3 v ddx4 c1 c2 v dd v ddl v dd v dde osc1 osc0 p6.0 p5.3 p5.2 p5.1 p5.0 p4.3 p4.2 p4.1 p4.0 p3.3 p3.2 p3.1 p3.0 p2.3 seg58 seg59 seg53 seg54 seg55 seg48 seg49 seg51 seg44 seg52 seg56 seg57 seg50 tst1 tst2 v dd3 xt1 xt0 reset md mdb v ddi p2.0 p1.3 p1.2 p1.1 p1.0 p0.3 (nc) (nc) p2.1 p2.2 com19 com20 com21 com22 pa.1 pa.0 p9.3 p9.2 v dd4 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 com1 com2 com3 com4 com5 com6 com7 com9 com10 com11 com12 com13 com14 com8 seg14 seg15 seg16 seg17 seg19 seg20 seg22 seg23 seg18 com15 com16 seg0 seg1 seg2 seg3 seg4 seg5 seg6 seg7 seg8 seg9 seg10 seg11 seg12 seg13 p0.2 p0.1 p0.0 v ss seg21 seg24 seg25 seg26 seg27 seg28 seg29 seg30 seg31 seg32 (nc) (nc) (nc) (nc) 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 (nc) (nc) seg81 seg82 seg83 seg76 seg77 seg78 seg79 seg80 seg84 seg85 seg74 seg75 seg72 seg73 (nc) seg93 seg94 seg95 com17 seg90 seg91 seg92 134 135 (nc) 127 126 125 124 123 122 121 133 132 131 130 129 128 142 141 140 139 138 137 136 146 145 144 143 180 (nc) pb.3 pb.2 pb.1 pb.0 pe.1 pe.0 194 193 192 191 190 189 188 187 186 pc.3 pc.2 pc.1 pc.0 195 185 184 183 182 181 (nc) (nc) (nc) pe.3 pe.2 207 p8.1 com30 (nc) (nc) (nc) (nc) (nc) (nc) (nc) (nc) (nc) (nc) seg33 seg34 seg35 seg86 seg87 seg88 seg89 240-pin plastic qfp (ga:qfp240-p-3232-0.50-bk4) note: pins marked as (nc) are no-connection pins which are left open.
fedl63295a-02 1 semiconductor ml63295a 6/38 pad configuration pad layout y x ml63295a p0.3 53 p1.0 52 p1.1 51 p1.2 50 p1.3 49 p2.0 48 p2.1 47 p2.2 46 p2.3 45 p3.0 44 p3.1 43 p3.2 42 p3.3 41 p4.0 40 p4.1 39 p4.2 38 p4.3 37 p5.0 36 p5.1 35 p5.2 34 p5.3 33 p6.0 32 p6.1 31 p6.3 29 p7.1 27 p7.2 26 p7.3 25 p8.0 24 p8.1 23 p8.2 22 p8.3 21 p9.0 20 p9.1 19 p9.2 18 pa.0 16 p9.3 17 pa.1 15 pa.2 14 pa.3 13 pb.0 12 pb.1 11 pb.2 10 pb.3 9 pc.0 8 pc.1 7 pc.2 6 pc.3 5 pe.0 4 pe.1 3 pe.2 2 1 pe.3 p7.0 28 p6.2 30 54 p0.2 55 p0.1 56 p0.0 57 v ss 58 com1 59 com2 60 com3 61 com4 62 com5 63 com6 64 com7 65 com8 66 com9 67 com10 68 com11 69 com12 70 com13 71 com14 72 com15 73 com16 74 seg0 75 seg1 76 seg2 77 seg3 78 seg4 79 seg5 80 seg6 81 seg7 82 seg8 83 seg9 84 seg10 85 seg11 86 seg12 87 seg13 88 seg14 89 seg15 90 seg16 91 seg17 92 seg18 93 seg19 94 seg20 95 seg21 96 seg22 97 seg23 98 seg24 99 seg25 seg26 100 seg27 101 seg28 102 seg29 103 104 seg30 105 seg31 106 seg32 107 seg33 108 seg34 109 seg35 163 seg89 162 seg88 seg87 161 160 seg86 159 seg85 158 seg84 seg83 157 156 seg82 155 seg81 154 seg80 153 seg79 152 seg78 151 seg77 150 seg76 149 seg75 148 seg74 147 seg73 146 seg72 145 seg71 144 seg70 143 seg69 142 seg68 141 seg67 140 seg66 139 seg65 137 seg63 138 seg64 136 seg62 135 seg61 134 seg60 133 seg59 131 seg57 132 seg58 130 seg56 129 seg55 128 seg54 127 seg53 126 seg52 125 seg51 124 seg50 123 seg49 122 seg48 121 seg47 120 seg46 119 seg45 118 seg44 117 seg43 116 seg42 115 seg41 114 seg40 113 seg39 112 seg38 111 seg37 110 seg36 seg90 164 seg91 165 seg92 166 seg93 167 seg94 168 seg95 169 com17 170 171 com18 172 com19 com20 173 com21 174 175 com22 176 com23 com24 177 178 com25 com26 179 com27 180 181 com28 182 com29 com30 183 184 com31 com32 185 186 v ss v dd1 187 188 v dd2 v dd3 189 v dd4 190 191 v dd5 192 v dd6 193 v ddx1 194 v ddx2 v ddx3 195 196 v ddx4 c1 197 198 c2 v dd 199 v ddl 200 v dd 201 202 v dde osc1 203 204 osc0 tst1 205 tst2 206 207 xt1 208 xt0 reset 209 md 210 mdb 211 v ddi 212 ( 0,0 ) chip size : 8.25 mm 8.20 mm chip thickness : 350 m (280 m: available as required) coordinate origin : center of chip pad hole size : 100 m 100 m pad size : 110 m 110 m minimum pad pitch : 120 m note: the chip substrate voltage is v ss .
fedl63295a-02 1 semiconductor ml63295a 7/38 pad coordinates pad no. pad name x ( m) y ( m) 1 pe.3 ?3138 ?3905 2 pe.2 ?3018 ?3905 3 pe.1 ?2898 ?3905 4 pe.0 ?2778 ?3905 5 pc.3 ?2658 ?3905 6 pc.2 ?2538 ?3905 7 pc.1 ?2418 ?3905 8 pc.0 ?2298 ?3905 9 pb.3 ?2178 ?3905 10 pb.2 ?2058 ?3905 11 pb.1 ?1938 ?3905 12 pb.0 ?1818 ?3905 13 pa.3 ?1698 ?3905 14 pa.2 ?1578 ?3905 15 pa.1 ?1458 ?3905 16 pa.0 ?1338 ?3905 17 p9.3 ?1218 ?3905 18 p9.2 ?1098 ?3905 19 p9.1 ?978 ?3905 20 p9.0 ?858 ?3905 21 p8.3 ?738 ?3905 22 p8.2 ?618 ?3905 23 p8.1 ?498 ?3905 24 p8.0 ?378 ?3905 25 p7.3 ?258 ?3905 26 p7.2 ?138 ?3905 27 p7.1 ?18 ?3905 28 p7.0 102 ?3905 29 p6.3 222 ?3905 30 p6.2 342 ?3905 31 p6.1 462 ?3905 32 p6.0 582 ?3905 33 p5.3 702 ?3905 34 p5.2 822 ?3905 35 p5.1 942 ?3905 36 p5.0 1062 ?3905 37 p4.3 1182 ?3905 38 p4.2 1302 ?3905 39 p4.1 1422 ?3905 pad no. pad name x ( m) y ( m) 40 p4.0 1542 ?3905 41 p3.3 1662 ?3905 42 p3.2 1782 ?3905 43 p3.1 1902 ?3905 44 p3.0 2022 ?3905 45 p2.3 2142 ?3905 46 p2.2 2262 ?3905 47 p2.1 2382 ?3905 48 p2.0 2502 ?3905 49 p1.3 2622 ?3905 50 p1.2 2742 ?3905 51 p1.1 2862 ?3905 52 p1.0 2982 ?3905 53 p0.3 3102 ?3905 54 p0.2 3965 ?3281 55 p0.1 3965 ?3161 56 p0.0 3965 ?3041 57 v ss 3965 ?2907 58 com1 3965 ?2766 59 com2 3965 ?2646 60 com3 3965 ?2526 61 com4 3965 ?2406 62 com5 3965 ?2286 63 com6 3965 ?2166 64 com7 3965 ?2046 65 com8 3965 ?1926 66 com9 3965 ?1806 67 com10 3965 ?1686 68 com11 3965 ?1566 69 com12 3965 ?1446 70 com13 3965 ?1326 71 com14 3965 ?1206 72 com15 3965 ?1086 73 com16 3965 ?966 74 seg0 3965 ?846 75 seg1 3965 ?726 76 seg2 3965 ?606 77 seg3 3965 ?486 78 seg4 3965 ?366 center of chip: x = 0, y = 0
fedl63295a-02 1 semiconductor ml63295a 8/38 pad no. pad name x ( m) y ( m) 79 seg5 3965 ?246 80 seg6 3965 ?126 81 seg7 3965 ?6 82 seg8 3965 114 83 seg9 3965 234 84 seg10 3965 354 85 seg11 3965 474 86 seg12 3965 594 87 seg13 3965 714 88 seg14 3965 834 89 seg15 3965 954 90 seg16 3965 1074 91 seg17 3965 1194 92 seg18 3965 1314 93 seg19 3965 1434 94 seg20 3965 1554 95 seg21 3965 1674 96 seg22 3965 1794 97 seg23 3965 1914 98 seg24 3965 2034 99 seg25 3965 2154 100 seg26 3965 2274 101 seg27 3965 2394 102 seg28 3965 2514 103 seg29 3965 2634 104 seg30 3965 2754 105 seg31 3965 2874 106 seg32 3965 2994 107 seg33 3965 3114 108 seg34 3965 3234 109 seg35 3965 3354 110 seg36 3185 3905 111 seg37 3065 3905 112 seg38 2945 3905 113 seg39 2825 3905 114 seg40 2705 3905 115 seg41 2585 3905 116 seg42 2465 3905 117 seg43 2345 3905 pad no. pad name x ( m) y ( m) 118 seg44 2225 3905 119 seg45 2105 3905 120 seg46 1985 3905 121 seg47 1865 3905 122 seg48 1745 3905 123 seg49 1625 3905 124 seg50 1505 3905 125 seg51 1385 3905 126 seg52 1265 3905 127 seg53 1145 3905 128 seg54 1025 3905 129 seg55 905 3905 130 seg56 785 3905 131 seg57 665 3905 132 seg58 545 3905 133 seg59 425 3905 134 seg60 305 3905 135 seg61 185 3905 136 seg62 65 3905 137 seg63 ?55 3905 138 seg64 ?175 3905 139 seg65 ?295 3905 140 seg66 ?415 3905 141 seg67 ?535 3905 142 seg68 ?655 3905 143 seg69 ?775 3905 144 seg70 ?895 3905 145 seg71 ?1015 3905 146 seg72 ?1135 3905 147 seg73 ?1255 3905 148 seg74 ?1375 3905 149 seg75 ?1495 3905 150 seg76 ?1615 3905 151 seg77 ?1735 3905 152 seg78 ?1855 3905 153 seg79 ?1975 3905 154 seg80 ?2095 3905 155 seg81 ?2215 3905 156 seg82 ?2335 3905 center of chip: x = 0, y = 0
fedl63295a-02 1 semiconductor ml63295a 9/38 pad no. pad name x ( m) y ( m) 157 seg83 ?2455 3905 158 seg84 ?2575 3905 159 seg85 ?2695 3905 160 seg86 ?2815 3905 161 seg87 ?2935 3905 162 seg88 ?3055 3905 163 seg89 ?3175 3905 164 seg90 ?3965 3432 165 seg91 ?3965 3312 166 seg92 ?3965 3192 167 seg93 ?3965 3072 168 seg94 ?3965 2952 169 seg95 ?3965 2832 170 com17 ?3965 2712 171 com18 ?3965 2592 172 com19 ?3965 2472 173 com20 ?3965 2352 174 com21 ?3965 2232 175 com22 ?3965 2112 176 com23 ?3965 1992 177 com24 ?3965 1872 178 com25 ?3965 1752 179 com26 ?3965 1632 180 com27 ?3965 1512 181 com28 ?3965 1392 182 com29 ?3965 1272 183 com30 ?3965 1152 184 com31 ?3965 1032 pad no. pad name x ( m) y ( m) 185 com32 ?3965 912 186 v ss ?3965 730 187 v dd1 ?3965 580 188 v dd2 ?3965 430 189 v dd3 ?3965 280 190 v dd4 ?3965 130 191 v dd5 ?3965 ?20 192 v dd6 ?3965 ?170 193 v ddx1 ?3965 ?320 194 v ddx2 ?3965 ?470 195 v ddx3 ?3965 ?620 196 v ddx4 ?3965 ?770 197 c1 ?3965 ?920 198 c2 ?3965 ?1070 199 v dd ?3965 ?1220 200 v ddl ?3965 ?1370 201 v dd ?3965 ?1520 202 v dde ?3965 ?1670 203 osc1 ?3965 ?1924 204 osc0 ?3965 ?2074 205 tst1 ?3965 ?2268 206 tst2 ?3965 ?2388 207 xt1 ?3965 ?2593 208 xt0 ?3965 ?2743 209 reset ?3965 ?2912 210 md ?3965 ?3120 211 mdb ?3965 ?3240 212 v ddi ?3965 ?3392 center of chip: x = 0, y = 0
fedl63295a-02 1 semiconductor ml63295a 10/38 pin descriptions the basic functions of each pin of the ml63295a are described in table 1. a symbol with a slash ?/? denotes a pin that has a secondary function. refer to table 2 for secondary functions. for type, ??? denotes a power supply pin, ?i? an input pin, ?o? an output pin, and ?i/o? an input-output pin. table 1 pin descriptions (basic functions) function symbol pin no. pad no. type description v dd 164, 166 199, 201 ? positive power supply pin v ss 6, 144 57, 186 ? negative power supply pin v dd1 145 187 v dd2 146 188 v dd4 149 190 v dd5 150 191 v dd6 151 192 ? power supply pins for lcd bias voltage (internally generated): capacitors (1.0 f) should be connected between these pins and v ss . v ddx1 153 193 ? positive power supply for low-speed oscillation. v dd3 147 189 v ddx4 157 196 ? power supply pins for lcd bias voltage generation: capacitors (1.0 f) should be connected between these pins and v ss . c1 158 197 c2 159 198 ? v ddx2 154 194 v ddx3 155 195 ? capacitor connection pins for lcd bias voltage generation: a capacitor (1.0 f) should be connected between c1 and c2, and between v ddx2 and v ddx3 . v ddi 179 212 ? positive power supply pin for external interface (power supply for input, output, and input-output ports) v ddl 165 200 ? positive power supply pin for internal logic (internally generated): a capacitor (0.1 f) should be connected between this pin and v ss . power supply v dde 167 202 ? constant voltage output pin: a capacitor (1.0 f) should be connected between this pin and v ss . xt0 174 208 i oscillation xt1 173 207 o low-speed clock oscillation pins: an option for using crystal oscillation or rc oscillation is chosen by the mask option. if the crystal oscillation is chosen, a crystal should be connected between xt0 and xt1, and capacitor (c g ) should be connected between xt0 and v ss . if the rc oscillation is chosen, external oscillation resistor (r osl ) should be connected between xt0 and xt1.
fedl63295a-02 1 semiconductor ml63295a 11/38 table 1 pin descriptions (basic functions) (continued) function symbol pin no. pad no. type description osc0 169 204 i oscillation osc1 168 203 o high-speed clock oscillation pins: a ceramic resonator and capacitors (c l0 , c l1 ) or external oscillation resistor (r osh ) should be connected to these pins. tst1 171 205 i test tst2 172 206 i input pins for testing. a pull-down resistor is internally connected to these pins. reset reset 175 209 i system reset input pin. setting this pin to ? h ? level puts this device into a reset state. then, setting this pin to ? l ? level starts executing an instruction from address 0000h. a pull-down resistor is internally connected to this pin. md 177 210 o melody output pin (non-inverted output) melody mdb 178 211 o melody output pin (inverted output)
fedl63295a-02 1 semiconductor ml63295a 12/38 table 1 pin descriptions (basic functions) (continued) function symbol pin no. pad no. type description p0.0/int5 5 56 p0.1/int5 4 55 p0.2/int5 3 54 p0.3/int5 237 53 i p1.0/int5 236 52 p1.1/int5 235 51 p1.2/int5 234 50 p1.3/int5 233 49 i 4-bit input ports: pull-up resistor input, pull-down resistor input, or high-impedance input is selectable for each bit. p2.0 232 48 p2.1 231 47 p2.2 230 46 p2.3 229 45 o p3.0 228 44 p3.1 227 43 p3.2 226 42 p3.3 225 41 o p4.0/a0 224 40 p4.1/a1 223 39 p4.2/a2 222 38 p4.3/a3 221 37 o p5.0/a4 220 36 p5.1/a5 219 35 p5.2/a6 218 34 p5.3/a7 217 33 o p6.0/a8 216 32 p6.1/a9 215 31 p6.2/a10 214 30 p6.3/a11 213 29 o p7.0/a12 212 28 p7.1/a13 211 27 p7.2/a14 210 26 p7.3/a15 209 25 o 4-bit output ports: p-channel open drain output, n-channel open drain output, cmos output, or high-impedance output is selectable for each bit. p8.0/ rd 208 24 p8.1/ wr 207 23 p8.2 206 22 p8.3/int4 205 21 i/o p9.0/d0 204 20 p9.1/d1 203 19 p9.2/d2 202 18 port p9.3/d3 201 17 i/o 4-bit input-output ports: in input mode, pull-up resistor input, pull-down resistor input, or high-impedance input is selectable for each bit. in output mode, p-channel open drain output, n-channel open drain output, cmos output, or high-impedance output is selectable for each bit.
fedl63295a-02 1 semiconductor ml63295a 13/38 table 1 pin descriptions (basic functions) (continued) function symbol pin no. pad no. type description pa.0/d4 200 16 pa.1/d5 199 15 pa.2/d6 198 14 pa.3/d7 197 13 i/o pb.0/int0 196 12 pb.1/int0 195 11 pb.2/int0/ t2ck 194 10 pb.3/int0/ t3ck 193 9 i/o pc.0/int1/ rxd 192 8 pc.1/int1/ txc 191 7 pc.2/int1/ rxc 190 6 pc.3/int1/ txd 189 5 i/o pe.0/sin 188 4 pe.1/sout 187 3 pe.2/sclk 186 2 port pe.3/int2 185 1 i/o 4-bit input-output ports: in input mode, pull-up resistor input, pull- down resistor input, or high-impedance input is selectable for each bit. in output mode, p-channel open drain output, n-channel open drain output, cmos output, or high-impedance output is selectable for each bit.
fedl63295a-02 1 semiconductor ml63295a 14/38 table 1 pin descriptions (basic functions) (continued) function symbol pin no. pad no. type description com1 7 58 com2 8 59 com3 9 60 com4 10 61 com5 11 62 com6 12 63 com7 13 64 com8 14 65 com9 15 66 com10 16 67 com11 17 68 com12 18 69 com13 19 70 com14 20 71 com15 21 72 com16 22 73 com17 128 170 com18 129 171 com19 130 172 com20 131 173 com21 132 174 com22 133 175 com23 134 176 com24 135 177 com25 136 178 com26 137 179 com27 138 180 com28 139 181 com29 140 182 com30 141 183 com31 142 184 lcd com32 143 185 o lcd common signal output pins
fedl63295a-02 1 semiconductor ml63295a 15/38 table 1 pin descriptions (basic functions) (continued) function symbol pin no. pad no. type description seg02374 seg12475 seg22576 seg32677 seg42778 seg52879 seg62980 seg73081 seg83182 seg93283 seg10 33 84 seg11 34 85 seg12 35 86 seg13 36 87 seg14 37 88 seg15 38 89 seg16 39 90 seg17 40 91 seg18 41 92 seg19 42 93 seg20 43 94 seg21 44 95 seg22 45 96 seg23 46 97 seg24 47 98 seg25 48 99 seg26 49 100 seg27 50 101 seg28 51 102 seg29 52 103 seg30 53 104 seg31 54 105 seg32 55 106 seg33 56 107 seg34 57 108 seg35 58 109 seg36 64 110 seg37 65 111 seg38 66 112 seg39 67 113 seg40 68 114 seg41 69 115 seg42 70 116 seg43 71 117 seg44 72 118 seg45 73 119 lcd seg46 74 120 o lcd segment signal output pins
fedl63295a-02 1 semiconductor ml63295a 16/38 table 1 pin descriptions (basic functions) (continued) function symbol pin no. pad no. type description seg47 75 121 seg48 76 122 seg49 77 123 seg50 78 124 seg51 79 125 seg52 80 126 seg53 81 127 seg54 82 128 seg55 83 129 seg56 84 130 seg57 85 131 seg58 86 132 seg59 87 133 seg60 88 134 seg61 89 135 seg62 90 136 seg63 91 137 seg64 92 138 seg65 93 139 seg66 94 140 seg67 95 141 seg68 96 142 seg69 97 143 seg70 98 144 seg71 99 145 seg72 100 146 seg73 101 147 seg74 102 148 seg75 103 149 seg76 104 150 seg77 105 151 seg78 106 152 seg79 107 153 seg80 108 154 seg81 109 155 seg82 110 156 seg83 111 157 seg84 112 158 seg85 113 159 seg86 114 160 seg87 115 161 seg88 116 162 seg89 117 163 seg90 122 164 seg91 123 165 seg92 124 166 seg93 125 167 seg94 126 168 lcd seg95 127 169 o lcd segment signal output pins
fedl63295a-02 1 semiconductor ml63295a 17/38 table 2 shows the secondary functions of each pin of the ml63295a. table 2 pin descriptions (secondary functions) function symbol pin no. pad no. type description pb.0/int0 196 12 pb.1/int0 195 11 pb.2/int0 194 10 pb.3/int0 193 9 i external 0 interrupt input pins the change of input signal level causes an interrupt to occur. the port b interrupt enable register (pbie) enables or disables an interrupt for each bit. pc.0/int1 192 8 pc.1/int1 191 7 pc.2/int1 190 6 pc.3/int1 189 5 i external 1 interrupt input pins the change of input signal level causes an interrupt to occur. the port c interrupt enable register (pcie) enables or disables an interrupt for each bit. pe.3/int2 185 1 i external 2 interrupt input pin the change of input signal level causes an interrupt to occur. p8.3/int4 205 21 i external 4 interrupt input pin the change of input signal level causes an interrupt to occur. p0.0/int5 5 56 p0.1/int5 4 55 p0.2/int5 3 54 p0.3/int5 237 53 p1.0/int5 236 52 p1.1/int5 235 51 p1.2/int5 234 50 external interrupt p1.3/int5 233 49 i external 5 interrupt input pins the change of input signal level causes an interrupt to occur. the port 0 interrupt enable register (p0ie) and port 1 interrupt enable register (p1ie) enable or disable an interrupt for each bit. pb.2/t2ck 194 10 i external clock input pin for timer 2 timer pb.3/t3ck 193 9 i external clock input pin for timer 3
fedl63295a-02 1 semiconductor ml63295a 18/38 table 2 pin descriptions (secondary functions) (continued) function symbol pin no. pad no. type description pc.0/rxd 192 8 i serial port receive data input pin pc.1/txc 191 7 i/o sync serial port clock input-output pin transmit clock output when this device is used as a master processor. transmit clock input when this device is used as a slave processor. pc.2/rxc 190 6 i/o sync serial port clock input-output pin receive clock output when this device is used as a master processor. receive clock input when this device is used as a slave processor. serial port pc.3/txd 189 5 o serial port transmit data output pin pe.0/sin 188 4 i shift register receive data input pin pe.1/sout 187 3 o shift register transmit data output pin shift register pe.2/sclk 186 2 i/o shift register clock input-output pin. clock output when this device is used as a master processor. clock input when this device is used as a slave processor. p4.0/a0 224 40 p4.1/a1 223 39 p4.2/a2 222 38 p4.3/a3 221 37 p5.0/a4 220 36 p5.1/a5 219 35 p5.2/a6 218 34 p5.3/a7 217 33 p6.0/a8 216 32 p6.1/a9 215 31 p6.2/a10 214 30 p6.3/a11 213 29 p7.0/a12 212 28 p7.1/a13 211 27 p7.2/a14 210 26 p7.3/a15 209 25 o address output bus for external memory p9.0/d0 204 20 p9.1/d1 203 19 p9.2/d2 202 18 p9.3/d3 201 17 pa.0/d4 200 16 pa.1/d5 199 15 pa.2/d6 198 14 pa.3/d7 197 13 i/o data bus for external memory p8.0/ rd 208 24 o read signal output pin for external memory (negative logic) external memory p8.1/ wr 207 23 o write signal output pin for external memory (negative logic)
fedl63295a-02 1 semiconductor ml63295a 19/38 absolute maximum ratings (v ss = 0 v) parameter symbol condition rating unit power supply voltage 1 v dd1 ta = 25c ?0.3 to +1.5 v power supply voltage 2 v dd2 ta = 25c ?0.3 to +2.5 v power supply voltage 3 v dd3 ta = 25c ?0.3 to +6.5 v power supply voltage 4 v dd4 ta = 25c ?0.3 to +4.5 v power supply voltage 5 v dd5 ta = 25c ?0.3 to +5.5 v power supply voltage 6 v dd6 ta = 25c ?0.3 to +6.5 v power supply voltage 7 v ddx1 ta = 25c ?0.3 to +2.0 v power supply voltage 8 v ddx4 ta = 25c ?0.3 to +6.5 v power supply voltage 9 v dd ta = 25c ?0.3 to +7.5 v power supply voltage 10 v ddi ta = 25c ?0.3 to +6.0 v power supply voltage 11 v ddl ta = 25c ?0.3 to +6.0 v power supply voltage 12 v dde ta = 25c ?0.3 to +6.0 v input voltage 1 v in1 v dd input, ta = 25 c ?0.3 to v dd + 0.3 v input voltage 2 v in2 v ddi input, ta = 25 c ?0.3 to v ddi + 0.3 v output voltage 1 v out1 v dd1 output, ta = 25 c ?0.3 to v dd1 + 0.3 v output voltage 2 v out2 v dd2 output, ta = 25 c ?0.3 to v dd2 + 0.3 v output voltage 3 v out3 v dd3 output, ta = 25 c ?0.3 to v dd3 + 0.3 v output voltage 4 v out4 v dd4 output, ta = 25 c ?0.3 to v dd4 + 0.3 v output voltage 5 v out5 v dd5 output, ta = 25 c ?0.3 to v dd5 + 0.3 v output voltage 6 v out6 v dd6 output, ta = 25c ?0.3 to v dd6 + 0.3 v output voltage 7 v out7 v ddx1 output, ta = 25c ?0.3 to v ddx1 + 0.3 v output voltage 8 v out8 v ddx4 output, ta = 25c ?0.3 to v ddx4 + 0.3 v output voltage 9 v out11 v dd output, ta = 25 c ?0.3 to v dd + 0.3 v output voltage 10 v out12 v ddi output, ta = 25 c ?0.3 to v ddi + 0.3 v output voltage 11 v out13 v dde output, ta = 25 c ?0.3 to v dde + 0.3 v storage temperature t stg ? ?55 to +150 c
fedl63295a-02 1 semiconductor ml63295a 20/38 recommended operating conditions (v ss = 0 v) parameter symbol condition range unit operating temperature t op ? ?20 to +70 c v dd ? 3.5 to 7.2 v operating voltage v ddi ? 1.8 to 5.5 v crystal oscillation frequency f xt c g = 5 to 25 pf 32.768 to 76.8 khz r osl = 1.5 m ? 32 k 30% r osl = 700 k ? 60 k 30% low-speed rc oscillation frequency f rosl r osl = 500 k ? 80 k 30% hz ceramic oscillation frequency f cm v dd = 3.5 to 7.2 v 200 k to 2 m hz r osh = 100 k ? 700 k 30% r osh = 75 k ? 1 m 30% r osh = 51 k ? 1.35 m 30% high-speed rc oscillation frequency f rosh v dd = 3.5 to 7.2 v r osh = 30 k ? 2 m 30% hz
fedl63295a-02 1 semiconductor ml63295a 21/38 typical characteristics of low-speed rc oscillation (v dd = 6.0 v, v ddi = 3.0 v) r osl [k ? ] f rosl [khz] reference data 10 100 1000 100 1000 10000 typical characteristics of high-speed rc oscillation (v dd = 6.0 v, v ddi = 3.0 v) f rosh [khz] r osh [k ? ] reference data 100 1000 10000 10 100 1000
fedl63295a-02 1 semiconductor ml63295a 22/38 electrical characteristics dc characteristics (1) (v dd = 3.5 to 7.2 v, v ddi = 1.8 to 5.5 v, v ss = 0 v, ta = ?20 to +70 c unless otherwise specified) parameter symbol condition min. typ. max. unit meas- uring circuit v dde voltage v dde i out = 0 to 15 ma, ta = 25c 2.7 3.0 3.3 v v dde voltage temperature deviation ? v dde ? ? ?4.0 ? mv/ c high-speed clock oscillation stopped 1.0 1.5 2.0 v ddl voltage v ddl during operation at high-speed clock oscillation (v dd = 3.5 to 7.2 v) 1.2 ? 3.3 crystal oscillation start voltage v sta oscillation start time: within 5 seconds 3.5 ? ? crystal oscillation hold voltage v hold ?3.5?? v crystal oscillation stop detect time t stop ? 0.1 ? 5.0 ms external rc oscillator capacitance c g ?5?25 internal rc oscillator capacitance c d ?202530 external ceramic oscillator capacitance c l0 , c l1 csa2.00mg (murata mfg.-make) used v dde = 3.0 v ?30? internal rc oscillator capacitance c os ? 8 12 16 pf por voltage v por1 v dd = 6.0 v 0 ? 0.7 non-por voltage v por2 v dd = 6.0 v 2.0 ? 6.0 v 1 ld1 = 1, ld0 = 1, ta = 25c 5.00 5.10 5.20 bld judgment voltage v bldc ld1 = 1, ld0 = 0, ta = 25c 4.40 4.50 4.60 v v bldc = 5.10 v (ld1 = 1, ld0 = 1) ? ?3.5 ? bld judgment voltage temperature deviation ? v bldc v bldc = 4.50 v (ld1 = 1, ld0 = 0) ? ?2.3 ? mv/c ? notes: 1. ? t stop ? indicates that if the crystal oscillator stops over the value of t stop , the system reset occurs. 2. ? por ? denotes power on reset. 3. ? v por1 ? indicates that por occurs when v dd falls from v dd to v por1 and again rises up to v dd 4. ? v por2 ? indicates that por does not occur when v dd falls from v dd to v por2 and again rises up to v dd .
fedl63295a-02 1 semiconductor ml63295a 23/38 dc characteristics (2) (v dd = 6.0 v, v ddi = 3.0 v, v ss = 0 v, 1/6 bias, dspcnt = 0h, ta = ?20 to +70c unless otherwise specified) parameter symbol condition min. typ. max. unit meas- uring circuit ta = ?20 to +50c ? 11.0 14.5 cpu in halt state, lcd is being driven, no panel load (crystal oscillation: 32.768 khz) (high-speed clock oscillation stopped) ta = ?20 to +70c ? 11.0 19.5 ta = ?20 to +50c ? 14.5 18.0 supply current 1 i dd1 cpu in halt state, lcd is being driven, no panel load (rc oscillation: r osl = 1.5 m ? ) (high-speed clock oscillation stopped) ta = ?20 to +70c ? 14.5 23.0 ta = ?20 to +50c ? 4.0 5.0 cpu in halt state, lcd in power down mode (crystal oscillation: 32.768 khz) (high-speed clock oscillation stopped) ta = ?20 to +70c ? 4.0 6.5 ta = ?20 to +50c ? 7.0 8.0 supply current 2 i dd2 cpu in halt state, lcd in power down mode (rc oscillation: r osl = 1.5 m ? ) (high-speed clock oscillation stopped) ta = ?20 to +70c ? 7.0 9.5 ta = ?20 to +50c ? 20.5 29.0 cpu operating at low speed, lcd is being driven, no panel load (crystal oscillation: 32.768 khz) (high-speed clock oscillation stopped) ta = ?20 to +70c ? 20.5 34.0 ta = ?20 to +50c ? 24.5 33.0 supply current 3 i dd3 cpu operating at low speed, lcd is being driven, no panel load (rc oscillation: r osl = 1.5 m ? ) (high-speed clock oscillation stopped) ta = ?20 to +70c ? 24.5 38.0 supply current 4 i dd4 cpu operating at high-speed oscillation (1 mhz rc oscillation, r osh = 75 k ? ) ? 1100 1700 supply current 5 i dd5 cpu operating at high-speed oscillation (2 mhz ceramic oscillation) ? 1500 2000 a1
fedl63295a-02 1 semiconductor ml63295a 24/38 dc characteristics (3) (v dd = 3.5 to 7.2 v, v ddi = 1.8 to 5.5 v, v ss = 0 v, ta = 25 c unless otherwise specified) parameter symbol condition min. typ. max. unit meas- uring circuit v dd6 voltage v dd6 1/6 bias, 1/5 bias 4.0 4.1 4.2 1/6 bias typ.?0.1 5/6 v dd6 typ.+0.1 v dd5 voltage v dd5 1/5 bias typ.?0.1 4/5 v dd6 typ.+0.1 1/6 bias typ.?0.1 4/6 v dd6 typ.+0.1 v dd4 voltage v dd4 1/5 bias typ.?0.1 3/5 v dd6 typ.+0.1 1/6 bias typ.?0.1 2/6 v dd6 typ.+0.1 v dd2 voltage v dd2 1/5 bias typ.?0.1 2/5 v dd6 typ.+0.1 1/6 bias typ.?0.1 1/6 v dd6 typ.+0.1 v dd1 voltage v dd1 1/5 bias typ.?0.1 1/5 v dd6 typ.+0.1 v1 note: ? v dd6 ? changes in the range from 4.10 to 6.14 v (typ. value) according to the value of display contrast register (dspcnt). (v dd = 3.5 to 7.2 v, v ddi = 1.8 to 5.5 v, v ss = 0 v, ta = ?20 to +70 c unless otherwise specified) parameter symbol condition min. typ. max. unit meas- uring circuit v dde voltage temperature deviation ? v dde ? ? ?4.0 ? mv/ c v dd6 voltage v dd6 1/6 bias, 1/5 bias 3.6 4.1 4.6 1/6 bias typ.?0.5 5/6 v dd6 typ.+0.5 v dd5 voltage v dd5 1/5 bias typ.?0.5 4/5 v dd6 typ.+0.5 1/6 bias typ.?0.5 4/6 v dd6 typ.+0.5 v dd4 voltage v dd4 1/5 bias typ.?0.5 3/5 v dd6 typ.+0.5 1/6 bias typ.?0.5 2/6 v dd6 typ.+0.5 v dd2 voltage v dd2 1/5 bias typ.?0.5 2/5 v dd6 typ.+0.5 1/6 bias typ.?0.5 1/6 v dd6 typ.+0.5 v dd1 voltage v dd1 1/5 bias typ.?0.5 1/5 v dd6 typ.+0.5 v 1 note: ? v dd6 ? changes in the range from 4.10 to 6.14 v (typ. value) according to the value of display contrast register (dspcnt).
fedl63295a-02 1 semiconductor ml63295a 25/38 ? contrast voltage (v dd6 voltage) ta = 25c, v dd6 = 4.1 v (typ.) dspcnt v dd6 voltage (v) cn0 to cn3 cn3 cn2 cn1 cn0 min. typ. max. display contrast 0h 0000 ? 4.1 ? light 1h 0001typ.?0.14.2typ.+0.1 2h 0010typ.?0.14.3typ.+0.1 3h 0011typ.?0.14.4typ.+0.1 4h 0100typ.?0.14.5typ.+0.1 5h 0101typ.?0.14.62typ.+0.1 6h 0110typ.?0.14.74typ.+0.1 7h 0111typ.?0.14.86typ.+0.1 8h 1000typ.?0.15.00typ.+0.1 9h 1001typ.?0.15.14typ.+0.1 0ah 1010typ.?0.15.29typ.+0.1 0bh 1011typ.?0.15.44typ.+0.1 0ch 1100typ.?0.15.60typ.+0.1 0dh 1101typ.?0.15.77typ.+0.1 0eh 1110typ.?0.15.95typ.+0.1 0fh 1111typ.?0.16.14typ.+0.1 dark ta = 25c, v dd6 = 4.0 v (min.) dspcnt v dd6 voltage (v) cn0 to cn3 cn3 cn2 cn1 cn0 min. typ. max. display contrast 0h 0000 ? 4.0 ? light 1h 0001typ.?0.14.1typ.+0.1 2h 0010typ.?0.14.2typ.+0.1 3h 0011typ.?0.14.3typ.+0.1 4h 0100typ.?0.14.4typ.+0.1 5h 0101typ.?0.14.52typ.+0.1 6h 0110typ.?0.14.64typ.+0.1 7h 0111typ.?0.14.76typ.+0.1 8h 1000typ.?0.14.90typ.+0.1 9h 1001typ.?0.15.04typ.+0.1 0ah 1010typ.?0.15.19typ.+0.1 0bh 1011typ.?0.15.34typ.+0.1 0ch 1100typ.?0.15.50typ.+0.1 0dh 1101typ.?0.15.67typ.+0.1 0eh 1110typ.?0.15.85typ.+0.1 0fh 1111typ.?0.16.04typ.+0.1 dark
fedl63295a-02 1 semiconductor ml63295a 26/38 ? contrast voltage (v dd6 voltage) ta = 25c, v dd6 = 4.2 v (max.) dspcnt v dd6 voltage (v) cn0 to cn3 cn3 cn2 cn1 cn0 min. typ. max. display contrast 0h 0000 ? 4.2 ? light 1h 0001typ.?0.14.3typ.+0.1 2h 0010typ.?0.14.4typ.+0.1 3h 0011typ.?0.14.5typ.+0.1 4h 0100typ.?0.14.6typ.+0.1 5h 0101typ.?0.14.72typ.+0.1 6h 0110typ.?0.14.84typ.+0.1 7h 0111typ.?0.14.96typ.+0.1 8h 1000typ.?0.15.10typ.+0.1 9h 1001typ.?0.15.24typ.+0.1 0ah 1010typ.?0.15.39typ.+0.1 0bh 1011typ.?0.15.54typ.+0.1 0ch 1100typ.?0.15.70typ.+0.1 0dh 1101typ.?0.15.87typ.+0.1 0eh 1110typ.?0.16.05typ.+0.1 0fh 1111typ.?0.16.24typ.+0.1 dark
fedl63295a-02 1 semiconductor ml63295a 27/38 dc characteristics (4) (v dd = 6.0 v, v ddi = v dde = 3.0 v, v dd1 = 1.0 v, v dd2 = 2.0 v, v dd3 = 3.0 v, v dd4 = 4.0 v, v dd5 = 5.0 v, v dd6 = 6.0 v, ta = ?20 to +70c unless otherwise specified) parameter symbol condition min. typ. max. unit meas- uring circuit v ddi = 3.0 v ?6.0 ?3.5 ?1.0 i oh1 v oh1 = v ddi ? 0.5 v v ddi = 5.0 v ?8.5 ?5.0 ?1.5 v ddi = 3.0 v 1.0 3.0 6.0 output current 1 (p2.0 to p2.3) (pc.0 to pc.3) (pe.0 to pe.3) i ol1 v ol1 = 0.5 v v ddi = 5.0 v 1.5 3.7 8.5 i oh2 v oh2 = v dde ? 0.7 v v dde = 3.0 v ?11.0 ?6.0 ?2.0 output current 2 (md, mdb) i ol2 v ol2 = 0.7 v v dde = 3.0 v 2.0 5.5 11.0 ma i oh3 v oh3 = v dd6 ? 0.2 v (v dd6 level) ? ? ?4 i ohm3 v ohm3 = v dd5 + 0.2 v (v dd5 level) 4 ? ? i ohm3s v ohm3s = v dd5 ? 0.2 v (v dd5 level) ? ? ?4 i omh3 v omh3 = v dd4 + 0.2 v (v dd4 level) 4 ? ? i omh3s v omh3s = v dd4 ? 0.2 v (v dd4 level) ? ? ?4 i oml3 v oml3 = v dd2 + 0.2 v (v dd2 level) 4 ? ? i oml3s v oml3s = v dd2 ? 0.2 v (v dd2 level) ? ? ?4 i olm3 v olm3 = v dd1 + 0.2 v (v dd1 level) 4 ? ? i olm3s v olm3s = v dd1 ? 0.2 v (v dd1 level) ? ? ?4 output current 3 (seg0 to seg95) (com1 to com32) i ol3 v ol3 = v ss + 0.2 v (v ss level) 4 ? ? a i oh4r v oh4r = v dde ? 0.5 v (rc oscillation) v dde = 3.0 v ?2.50 ?1.30 ?0.25 i ol4r v ol4r = 0.5 v (rc oscillation) v dde = 3.0 v 0.25 1.50 2.50 ma i oh4c v oh4c = v dde ? 0.5 v (ceramic oscillation) v dde = 3.0 v ?300 ?120 ?60 output current 4 (osc1) i ol4c v ol4c = 0.5 v (ceramic oscillation) v dde = 3.0 v 60 120 300 i ooh v oh = v ddi ??0.3 output leakage current (p2.0 to p2.3) (pc.0 to pc.3) (pe.0 to pe.3) i ool v ol = v ss ?0.3 ? ? a 2
fedl63295a-02 1 semiconductor ml63295a 28/38 dc characteristics (5) (v dd = 6.0 v, v ddi = v dde = 3.0 v, v dd1 = 1.0 v, v dd2 = 2.0 v, v dd3 = 3.0 v, v dd4 = 4.0 v, v dd5 = 5.0 v, v dd6 = 6.0 v, ta = ?20 to +70c unless otherwise specified) parameter symbol condition min. typ. max. unit meas- uring circuit v ddi = 3.0 v 10 20 40 i ih1 v ih1 = v ddi (when pulled down) v ddi = 5.0 v 20 60 120 v ddi = 3.0 v ?40 ?20 ?10 i il1 v il1 = v ss (when pulled up) v ddi = 5.0 v ?120 ?60 ?20 i ih1z v ih1 = v ddi (in a high impedance state) 0 ? 1.0 input current 1 (p0.0 to p0.3) (p1.0 to p1.3) (p8.0 to p8.3) (pc.0 to pc.3) (pe.0 to pe.3) i il1z v il1 = v ss (in a high impedance state) ?1.0 ? 0 i il2 v il2 = v ss (when pulled up) v dde = 3.0 v ?350 ?170 ?30 i ih2r v ih2r = v dde (rc oscillation) 0 ? 1.0 i il2r v il2r = v ss (rc oscillation) ?1.0 ? 0 i ih2c v ih2r = v dde (ceramic oscillation) 0.1 0.5 1.0 input current 2 (osc0) i il2c v il2r = v ss (ceramic oscillation) ?1.0 ?0.5 ?0.1 i ih3 v ih3 = v dd v dd = 6.0 v 40 60 150 input current 3 (reset) i il3 v il3 = v ss ?1.0 ? 0 a i ih4 v ih4 = v dd v dd = 6.0 v 4.0 12.0 16.0 ma input current 4 (tst1, tst2) i il4 v il4 = v ss ?1.0 ? 0 a 3
fedl63295a-02 1 semiconductor ml63295a 29/38 dc characteristics (6) (v dd = 6.0 v, v ddi = v dde = 3.0 v, v dd1 = 1.0 v, v dd2 = 2.0 v, v dd3 = 3.0 v, v dd4 = 4.0 v, v dd5 = 5.0 v, v dd6 = 6.0 v, ta = ?20 to +70c unless otherwise specified) parameter symbol condition min. typ. max. unit meas- uring circuit v ddi = 3.0 v 2.3 ? 3.0 v ih1 v ddi = 5.0 v 3.8 ? 5.0 v ddi = 3.0 v 0 ? 0.7 input voltage 1 (p0.0 to p0.3) (p1.0 to p1.3) (p8.0 to p8.3) (pc.0 to pc.3) (pe.0 to pe.3) v il1 v ddi = 5.0 v 0 ? 1.2 v ih2 2.4 ? 3.0 input voltage 2 (osc0) v il2 v dde = 3.0 v 0?0.6 v ih3 4.8 ? 6.0 input voltage 3 (reset, tst1, tst2) v il3 v dd = 6.0 v 0?1.2 v ddi = 3.0 v 0.2 0.5 1.0 hysteresis width 1 (p0.0 to p0.3) (p1.0 to p1.3) (p8.0 to p8.3) (pc.0 to pc.3) (pe.0 to pe.3) ? v t1 v ddi = 5.0 v 0.25 1.00 1.50 hysteresis width 2 (reset, tst1, tst2) ? v t2 v dd = 5.0 v 0.25 1.00 1.50 v4 input pin capacitance (p0.0 to p0.3) (p1.0 to p1.3) (p8.0 to p8.3) (pc.0 to pc.3) (pe.0 to pe.3) c in ???5pf?
fedl63295a-02 1 semiconductor ml63295a 30/38 measuring circuit 1 v c b v dde xt0 xt1 osc0 osc1 a (*1) c 12 c1 c2 v c a v ss v dd v dd1 v dd2 c c v dd3 v c e v c d v dd4 v dd5 v c f v dd6 v c i v ddl v ddi v ddx1 c x1 v ddx2 c x23 v ddx3 v ddx4 c x4 v c xe (*2) c x1 , c x23 , c x4 , c xe : 1.0 f c a , c b , c c , c d , c e , c f , c 12 : 1.0 f c l : 0.1 f c g : 15 pf c l0 : 30 pf c l1 : 30 pf ceramic resonator : csa2.00mg (2 mhz) : csb1000j (1 mhz) (murata mfg-.make) *1 rc oscillator r osh ceramic oscillator c l0 c l1 ceramic resonator r osl crystal oscillator c g 32.768 khz crystal 1 2 1 2 3 4 3 4 *2 rc oscillator 1 2 3 4
fedl63295a-02 1 semiconductor ml63295a 31/38 measuring circuit 2 v ih input *3 v il a *4 v dd4 v dd2 v ddi v ss v dd v dd1 v dd5 v dd6 v ddl v dde output *3 input logic circuit to determine the specified measuring conditions. *4 measured at the specified output pins. measuring circuit 3 v dd2 v dd1 a *5 v dde v ss v dd v ddi v dd4 v dd6 v dd5 v ddl input output measuring circuit 4 v ih *5 v il waveform monitoring v dd2 v dd1 v dde v dd v ddi v dd4 v dd6 v dd5 v ss v ddl input output *5 measured at the specified input pins.
fedl63295a-02 1 semiconductor ml63295a 32/38 ac characteristics (serial interface, serial port) (1) synchronous communication (v dd = 3.5 to 7.2 v,v ss = 0 v, v ddi = 5.0 v, ta = ?20 to +70 c unless otherwise specified) parameter symbol condition min. typ. max. unit txc/rxc input fall time t f ???1.0 txc/rxc input rise time t r ???1.0 txc/rxc input ? l ? level pulse width t cwl ?0.8?? txc/rxc input ? h ? level pulse width t cwh ?0.8?? txc/rxc input cycle time t cyc ?2.0?? t cyc1 (o) cpu operating at 32.768 khz ? 30.5 ? txc/rxc output cycle time t cyc2 (o) cpu operating at 2 mhz ? 0.5 ? txd output delay time t ddr output load capacitance 10 pf ??0.4 rxd input setup time t ds ?0.5?? rxd input hold time t dh ?0.8?? s synchronous communication timing (?h? level = 4.0 v, ?l? level = 1.0 v) t r t f t cwh t cwl t ddr t ddr t cyc t ds t ds t dh v ddi v ss v ddi v ss v ddi v ss txc (pc.1)/ rxc (pc.2) txd (pc.3) rxd (pc.0)
fedl63295a-02 1 semiconductor ml63295a 33/38 (2) uart communication parameter symbol condition min. typ. max. unit transmit baud rate t brt t brt = 1/f brt t cr = 1/f osc t brt ? t cr t brt t brt + t cr receive baud rate r brt r brt = 1/f brt r brt 0.97 r brt r brt 1.03 s f brt : baud rates (1200, 2400, 4800, 9600 bps) uart communication timing (?h? level = 4.0 v, ?l? level = 1.0 v) t brt v ddi v ss txd (pc.3) r brt v ddi v ss rxd (pc.0)
fedl63295a-02 1 semiconductor ml63295a 34/38 ac characteristics (serial interface, shift register) (v dd = 3.5 to 7.2 v, v ddi = 5.0 v, v ss = 0 v, ta = ?20 to +70 c unless otherwise specified) parameter symbol condition min. typ. max. unit sclk input fall time t f ???1.0 sclk input rise time t r ???1.0 sclk input ? l ? level pulse width t cwl ?0.8?? sclk input ? h ? level pulse width t cwh ?0.8?? sclk input cycle time t cyc v ddi = v dde to 5.5 v 1.8 ? ? t cyc1(o) cpu operating at 32.768 khz ? 30.5 ? sclk output cycle time t cyc2(o) cpu operating at 2 mhz ? 0.5 ? sout output delay time t ddr output load capacitance 10 pf ? ? 0.4 sin input setup time t ds ?0.5?? sin input hold time t dh ?0.8?? s ac characteristics timing (?h? level = 4.0 v, ?l? level = 1.0 v) t r t f t cwh t cwl t ddr t ddr t cyc t ds t ds t dh v ddi v ss v ddi v ss v ddi v ss sclk (pe.2) sout (pe.1) sin (pe.0)
fedl63295a-02 1 semiconductor ml63295a 35/38 ac characteristics (external memory interface) (v dd = 3.5 to 7.2 v, v ss = 0 v, v ddi = 5.0 v, ta = ?20 to +70c unless otherwise specified) (1) for reading from external memory (a) when the cpu operates at 32.768 khz parameter symbol condition min. typ. max. unit read cycle time t rc ??61.0? rd output delay time t oe ???5.0 output enable time t oha ???5.0 external memory output delay time t do ???5.0 s (b) when the cpu operates at 2 mhz (v dd = 3.5 to 7.2 v) parameter symbol condition min. typ. max. unit read cycle time t rc ?1.0?? s rd output delay time t oe ? ? ? 100 output enable time t oha ? ? ? 100 external memory output delay time t do ? ? ? 150 ns ac characteristics timing (?h? level = 4.0 v, ?l? level = 1.0 v) system clock port set value input data port set value address output port set value t rc t oe t oha t do v ddi movxb obj, xadr16 movxb obj, [ra] v ss v ss v ddi v ddi v ss port set value s1 s2 s1 s2 s1 s2 p7 to p4 (a15 to a0) p8.0 ( rd ) pa, p9 (d7 to d0)
fedl63295a-02 1 semiconductor ml63295a 36/38 (2) for writing to external memory (a) when the cpu operates at 32.768 khz parameter symbol condition min. typ. max. unit write cycle time t wc ??61.0? address setup time t as ??30.5? write time t w ??15.3? write recovery time t wr ??15.3? data setup time t ds ??45.8? data hold time t dh ??15.3? s (b) when the cpu operates at 2 mhz (v dd = 3.5 to 7.2 v) parameter symbol condition min. typ. max. unit write cycle time t wc ?1.0?? address setup time t as ?0.4?? write time t w ?0.2?? write recovery time t wr ?0.2?? data setup time t ds ?0.7?? data hold time t dh ?0.2?? s ac characteristics timing (?h? level = 4.0 v, ?l? level = 1.0 v) s1 port set value address output t wc t ds t dh t wr t w t as v ddi v ss v ddi v ss v ddi v ss movxb [ra], obj movxb xadr16, obj port set value port set value output data port set value system cloc k p7 to p4 (a15 to a0) pa, p9 (d7 to d0) p8.1 ( wr ) s2 s1 s2 s1 s2
fedl63295a-02 1 semiconductor ml63295a 37/38 package dimensions qfp240-p-3232-0.50-bk4 mirror finish package material epoxy resin lead frame material cu alloy pin treatment solder plating ( 5m) package weight (g) 7.82 typ. 5 rev. no./last revised 2/nov. 28, 1996 notes for mounting the surface mount type package the surface mount type packages are very susceptible to heat in reflow mounting and humidity absorbed in storage. therefore, before you perform reflow mounting, contact oki?s responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). (unit: mm)
fedl63295a-02 1 semiconductor ml63295a 38/38 notice 1. the information contained herein can change without notice owing to product and/or technical improvements. before using the product, please make sure that the information being referred to is up-to-date. 2. the outline of action and examples for application circuits described herein have been chosen as an explanation for the standard action and performance of the product. when planning to use the product, please ensure that the external conditions are reflected in the actual circuit, assembly, and program designs. 3. when designing your product, please use our product below the specified maximum ratings and within the specified operating ranges including, but not limited to, operating voltage, power dissipation, and operating temperature. 4. oki assumes no responsibility or liability whatsoever for any failure or unusual or unexpected operation resulting from misuse, neglect, improper installation, repair, alteration or accident, improper handling, or unusual physical or electrical stress including, but not limited to, exposure to parameters beyond the specified maximum ratings or operation outside the specified operating range. 5. neither indemnity against nor license of a third party?s industrial and intellectual property right, etc. is granted by us in connection with the use of the product and/or the information and drawings contained herein. no responsibility is assumed by us for any infringement of a third party?s right which may result from the use thereof. 6. the products listed in this document are intended for use in general electronics equipment for commercial applications (e.g., office automation, communication equipment, measurement equipment, consumer electronics, etc.). these products are not authorized for use in any system or application that requires special or enhanced quality and reliability characteristics nor in any system or application where the failure of such system or application may result in the loss or damage of property, or death or injury to humans. such applications include, but are not limited to, traffic and automotive equipment, safety devices, aerospace equipment, nuclear power control, medical equipment, and life-support systems. 7. certain products in this document may need government approval before they can be exported to particular countries. the purchaser assumes the responsibility of determining the legality of export of these products and will take appropriate and necessary steps at their own expense for these. 8. no part of the contents contained herein may be reprinted or reproduced without our prior permission. copyright 2001 oki electric industry co., ltd.

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